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TSMC

Standard Cell Characterization Engineer

Yokohama or Osaka, 14, JPPosted 2 weeks ago
onsite

Job Description

Job Description

- Define and implement standard cell characterization methodology for leading edge technology.
- Path finding and innovation of new cell and/or new feature characterization.
- Define sub threshold voltage characterization for IoT application.
- Develop best-in-class library characterization production flow to meet advanced customers’ requirement.
- Communication with EDA tool vendor to resolve issues found in production.

 

■Qualification

- BCH degree and above in relevant field.
- In-depth understanding of Liberty format (NLDM, CCS, ECSM) and transistor level spice simulation.
- Knowledge of static timing, power, EMIR analysis using EDA tools.
- Statistical variation simulation and analysis, including LVF.
- Hands-on coding experience of Perl and/or Python.
- Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated.
- Good command of Japanese.
- Strong written and oral communication skills in English is a plus."

 

 

 

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

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Standard Cell Characterization Engineer at TSMC | Renata