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Job Description
- Define and document the microarchitecture for digital designs within the TPU.
- Partner with Verification to develop test plans and debug RTL, and collaborate with Physical Design to achieve timing, area, power, and manufacturability goals.
- Drive critical power optimization and automation initiatives across all on-chip-network components and subsystems.
- Support post-silicon validation and hardware debugging efforts to ensure successful deployment.
- Lead the development and enhancement of internal design tools, flows, and engineering methodologies.