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Job Description
- Define and document complex microarchitecture for the TPU, writing high-quality, performant, and power-efficient RTL code primarily in SystemVerilog.
- Partner with cross-functional teams to drive block-level and chip-level integration efforts for the machine learning accelerators.
- Collaborate closely with the verification team to develop robust test plans, debug RTL, and guarantee overall functional correctness.
- Support post-silicon validation and debugging efforts while contributing to the continuous enhancement of internal design tools, flows, and methodologies.
- Work closely with the physical design team to meet timing, area, power, and manufacturability requirements.