VLSI Optimization Engineer

As a leading technology innovator, Qualcomm pushes the boundaries of what’s possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all.

Are you passionate about building intelligent tools to solve real-world VLSI design challenges? Do you want to leverage modern AI-assisted development techniques to rapidly prototype and deploy impactful solutions? This role focuses on VLSI design automation with strong linkage to physical layout and sign-off quality.

In this role, you will:

• Work closely with internal teams to understand VLSI design and layout challenges

• Apply software engineering and algorithmic thinking to build scalable automation solutions

• Utilize modern AI-assisted tools (e.g., AI agents, code generation) to improve development productivity

• Contribute to solving DTCO and physical design trade-offs with awareness of sign-off requirements

Key Responsibilities

• Collaborate with cross-functional teams to understand design, layout, and process constraints

• Develop and maintain automation tools for VLSI design productivity improvement

• Leverage AI-assisted development tools (e.g., code generation, AI agents) to accelerate development

• Understand and incorporate physical design and verification requirements, including:

  • DRC (Design Rule Check)

  • LVS (Layout vs. Schematic)

  • Basic parasitic and sign-off considerations

• Support analysis of design trade-offs (DTCO) across design and process domains

• Write clean, maintainable, and scalable code

Basic Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related field

• Strong programming skills in Python or similar languages

• Experience with Linux/Unix development environments

• Solid foundation in:

  • Data structures and algorithms

  • General mathematical reasoning and problem-solving ability

• Basic understanding of:

  • VLSI design fundamentals (CMOS, circuits, or physical design concepts)

  • Physical verification concepts (DRC, LVS, sign-off flows)

• Exposure to:

  • AI-assisted development tools (e.g., code generation, scripting automation, or similar workflows)

  • Constraint-based problem solving, such as:

    • Constraint Satisfaction Problems (CSP)

    • ILP / SAT / SMT approaches (conceptual understanding is sufficient)

Preferred Qualifications

• Hands-on project or internship experience in VLSI CAD / EDA / layout / physical design automation

• Familiarity with layout data formats, design rules, or basic EDA tools

• Experience applying optimization or algorithmic problem-solving to real-world problems

• Experience using AI tools to improve coding productivity in practical workflows

• Strong debugging, problem decomposition, and learning ability

• Good communication and teamwork skills

Why Qualcomm?

• Innovative Environment: Work on cutting-edge semiconductor technologies

• Learning & Growth: Strong mentorship and growth opportunities for early-career engineers

• Impact: Build tools that directly influence real silicon products

• Collaborative Culture: Work across design, process, and software domains