Senior DSP ASIC Architect - Optical Communication
Job Description
As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.
Ciena enables next-generation high-speed connectivity through advanced optical communication innovation and a people-first culture. This role contributes to the architecture and development of coherent DSP solutions for 800G/1.6T transmission systems and beyond. The position plays a key role in advancing DSP ASIC technologies that power market-leading optical platforms.
How you will make an impact:
Define system architecture for high-speed optical DSP chips, optimizing data rates and power consumption
Develop DSP algorithms for equalization, error correction, clock data recovery (CDR), and signal optimization
Collaborate with hardware, firmware, and chip design teams to optimize performance, power, and silicon area
Perform system-level modeling and simulation to validate DSP algorithms and architectures
Partner with photonics and RF teams to enable DSP and optical front-end integration
Establish performance metrics, validation methodologies, and compliance with optical communication standards
Engage with customers and industry partners to align DSP innovation with market requirements.
The must haves:
Education: Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
Experience: 5+ years of industry experience in DSP algorithm development, system architecture, and ASIC design for optical communications
Application of digital signal processing, communication theory, and error correction codes
Collaboration within globally distributed, multinational engineering teams
Utilization of MATLAB, Python, and C/C++ for DSP simulation and algorithm development
Knowledge of ASIC and FPGA design and system-on-chip integration using VHDL and related chip design flows
Experience with photonic ICs and DSP co-design.
Nice to haves:
Awareness of optical industry standards such as OIF and interoperability requirements
Experience working across cross-functional engineering teams in product development environments.
At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.