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Job Description
- Define the global back-end and custom Physical Design methodology, driving the transition to automated Analog and Mixed-Signal (AMS) flows and "Layout-Aware" design.
- Lead full custom digital circuit design at the transistor level optimized for low power.
- Evaluate and de-risk new process features in GAA (Gate-All-Around) nodes (e.g., Backside Power Delivery, Buried Power Rails) for high-speed analog use cases.
- Drive the long-term Roadmap for Area and Power density, ensuring our PHYs remain the most efficient in the industry.
- Act as the primary liaison with foundries to optimize Design for Manufacturing (DFM) and maximize yield for massive TPU-scale chips.