Job Details:

Job Description: 

• Be a part of Intel's Advanced Packaging Command Center (APCC), the global command center for advanced packaging that provides remote capabilities, follow-on engineering, and operational support across Wafer Packaging Manufacturing (WPM).

• Through APCC, engineering expertise is focused to improve coordination across regions, drive standardization, and improve responsiveness, while strengthening end-to-end operational execution across regions and delivering consistent, high-quality execution at scale.

• As the defect review technician, you will be instrumental in supporting global defect review activities, including defect classification, validation, and hold lot disposition. You will help maintain quality excellence while contributing to APCC's mission of delivering standardized, high-quality execution at scale.

• Your primary focus will be the accurate classification of defects captured by multiple inspection systems.

• Through precise defect classification, you will play a vital role in minimizing defect noise, driving systematic defect reduction initiatives, and maintaining the optimal balance between quality control and manufacturing efficiency.

Key Responsibilities
1. Defect Classification and Analysis
• Review and Analyze defect images captured by diverse metrology tools.
• Accurately classify defects based on documented defect specification.
• Distinguish between true defects requiring disposition action and false positives or nuisance defects.
• Maintain proficiency across multiple inspection platforms and adapt classification criteria to different tool capabilities and imaging conditions

2. Defect Validation
• Verify defect classifications against established criteria and specifications
• Partner with Layer Owner to ensure consistent defect categorization approaches
• Prevent over-rejection scenarios by accurately identifying non-critical defects and cosmetic variations that do not impact product performance.
• Avoid under-rejection situations by ensuring killed defects are properly identified and flagged for disposition.

3. Hold Lot Disposition
• Ensure strict compliance in review and disposition of hold lots based on documented Out-of-Control Action Plans (OCAP)
• Ensure proper documentation and traceability of all disposition decisions.
• Collaborate with Layer Owner to update and refine OCAP procedures based on emerging defect patterns

4. First Level Defect Analysis
• Perform comprehensive first level defect analysis as the initial point of technical review for all flagged defects.
• Document initial findings and recommendations to support Layer Owner analysis and decision-making processes.

Qualifications:

Minimum Qualifications:
-Diploma in Engineering or Technical discipline (e.g., Electrical, Mechanical, Manufacturing, Mechatronics, Semiconductor-related fields)

Preferred Qualifications:
- 3-5 years of experience in wafer assembly processes, manufacturing systems, or the semiconductor environment.
- Familiarity with wafer fabrication, assembly processes, and associated failure modes or mechanisms.
- Strong problem-solving skills, attention to detail with operational steps and defects, and an ability to manage multiple tasks concurrently.
- Effective written and verbal communication skills in English.

Additional requirement:
• Good communication and teamwork abilities
• Willingness to learn and adapt to new functions
• Attention to detail and commitment to quality standards
• Ability to work at a desk workstation for extended periods while maintaining focus and accuracy
• Ergonomic awareness and ability to maintain proper posture during extended computer-based work sessions
• Adaptability to rotating shift patterns to provide continuous coverage across multiple time zones

We invite you to bring your skills, curiosity, and commitment to innovation to Intel, where you can contribute to groundbreaking solutions and shape the future of technology. Apply today to embark on your next career adventure.

          

Job Type:

Experienced Hire

Shift:

Shift 14 5 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.