
FPGA Engineer (Open also to Protected Categories, Law 68/99)
Job Description
Thales people architect solutions that enable two-thirds of planes to take off and land safely. Our Ground Navigation portfolio offers a complete range of products which includes the latest generation of ILS, DME, VOR and TACAN systems. With more than 7,000 Navigation aids and landing systems installed worldwide in 172 countries, we are leading the Navaids market.
The second product line of NAS is Non-Radar Surveillance (NRS) with an installed base of more than 2.200 ADS-B and MLAT ground stations.
We are currently looking for an FPGA Engineer to join Thales Land and Air Systems in its Navaids Center of Competence Gorgonzola (near Milan).
Technically responsible for complex boards design and its consistency with the solution, the HW Engineer coordinates with the solution Engineering Manager and PDA in order to make sure that the top down refinement of the solution is consistent with the hardware strategy and constraints including COTS selection and components reuse.
Key Responsibilities and Tasks:
- Design and development of signal-processing schemes on FPGA for real-time high-demanding applications (RF SDR architectures)
- Generates the component requirements and specifications, defining top-level architecture as well as micro architecture for detailed implementation.
- Develops Verilog code, defining verification methodology and building a test bench for self-checking verification
- Defines the IP modelling to verify RTL functionality vs. requirements, performing detailed synthesis, timing analysis, and analysis of system level functionality.
- Works with the project team, contributing to design reviews to ensure adherence to the company FPGA design process and methodology
- Support lab evaluation and debug activities at board level using logic analysers, oscilloscopes, etc...
- Support the SW team, supporting the debug and implementing the changes required to ensure product delivery
- Guarantees adherence to in-scope standards, reuse policy and product development plans
Experience needed:
- Experience in Telecommunications design and/or SDR architectures
- Experience with complete design FPGA flows involving timing closure of high-speed digital design using scripting languages and design automation
- Solid knowledge of Xilinx (both ISE and Vivado) and Microsemi architectures and tools
- Previous experience in DO254 designs and compliance verification is a plus
- Hands-on experience with C/C++ applications development, multi tasks applications, tasks scheduling and inter-tasks communication is a plus
- Hands-on experience with real-time systems is a plus
Communication:
- Strong communication skills required, including the ability to clearly express technical concepts in verbal and written forms across different management levels.
- Ability to work in team. Taste for international contacts. Manifest the flexibility needed to be integrated in the different stages of a project.
- Technical leadership – with ability to build and sustain good working relationships with staff, peers and managers, customers and other stakeholders.
Skills and Qualifications:
- Master’s degree in in Electronic/ Telecommunication Engineering with 4+ years’ experience
- Interpersonal skills – the ability to communicate effectively with peers and act proactively within a team environment
- English and Italian fluent is a must
- Ability to speak additional languages as German or French is a benefit
- The role will require travel for less than 10% of the time