Digital Design Engineer
Job Description
Develop a thorough understanding of system-level design specifications
Verilog RTL Coding, Synthesis, Simulation of the digital IPs
Develop advanced verification environment and test-bench components
Conduct RTL linting, CDC/RDC checks, and formal verification as part of the sign-off flow
Perform synthesis, timing analysis, and work with physical design teams on DFT and timing closure
Hardware verification of the digital module using cutting edge FPGA kits
Gate level verification of digital IPs
Essential Qualifications and Experience:
Bachelor’s degree of: Electronics Engineering, M.Sc. in Electronics Engineering is a plus
0-3 Years of experience in VLSI Digital Design/Verification, gate verification techniques is a plus
Strong knowledge of Verilog RTL design/simulation
Knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques
Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off
Solid understanding of static timing analysis (STA) and timing constraints (SDC)
Desirable Qualifications and Experience:
Familiarity with System Verilog, UVM, RTL/gate verification techniques
Knowledge of Unix/Linux operating system
Knowledge of shell scripting/programming languages
Life at Mixel
At Mixel, a Silvaco company, we believe in empowering our people and meeting them where they are in their careers. Our Total Rewards package is designed to reflect the local culture and community where our employees live and work — because we know success starts with feeling valued and supported. Our people are our greatest strength. We also believe in a pay-for-performance philosophy — rewarding impact, recognizing achievements, and providing security for the future. Here are some of the key highlights:
· Competitive pay
· Annual and spot bonuses
· Long-term incentive plan awards (RSUs)
· Health benefits
· Paid holidays and time off
· Various learning and leadership opportunities