Back to jobs
Job Description
- Work independently to create and review clock control subsystem's design micro-architecture specifications.
- Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
- Work with architecture and power teams to evaluate features and their impact.
- Work with Design Validation (DV) teams to create test plans to verify, and debug design RTL.
- Work with physical design teams to ensure design meets physical requirements and timing closure.