Analog Mixed-Signal (AMS) Team is seeking a self-motivated SERDES Micro Architect to drive the definition of our next generation IPs. The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch.
Principal SerDes Validation Engineer
Marvell Technology · Santa Clara, CA
Test Engineer – SerDes high speed IP ATE Test Development & Characterization
Qualcomm · Singapore, SG
Senior Manager, Serdes Analog Design
Samsung Semiconductor · San Jose, California, United States
SerDes RTL Design Engineer
amd · Markham, Ontario, Canada
Head of Program & Portfolio Management – SerDes Networking Solutions
NXP Semiconductors · San Jose (Rose Orchard)
Principal Silicon Validation Engineer, SerDes/PAM4
Astera Labs · San Jose, California, United States
