

Technologist Engineer, ASIC Development Engineering (SoC Validation Lead, PCIe Protocol Expertise)
Sandisk · Bengaluru, KA, India
Senior Staff Hardware Design Engineer - PCB layout and fabrication and mixed-signal design and ODSP and AEC and PCIe
Marvell Technology · Santa Clara, CA
Principal Product Application Engineer - PCIe
Astera Labs · San Jose, California, United States
Senior Firmware Engineer - PCIe/CXL Memory Solutions
Astera Labs · San Jose, California, United States
Product Marketing Manager - PCIe
Astera Labs · San Jose, CA
Senior Staff Design Verification Engineer – PCIE/CXL Sub-System
Marvell Technology · Irvine, CA