Job Description
Job Title: Hardware Engineer II
Honeywell Aerospace is one of the 4 strategic business groups (SBG) in Honeywell, a Fortune 500 company. It is a $13 billion global business and a provider of integrated avionics, engines, systems and services for airlines, aircraft manufacturers, business and general aviation, military, space and airport operations. Our vision is to transform the world with innovative Aerospace technologies and solutions, developed by a highly skilled and motivated global team.
As an integral part of Honeywell Aerospace’s global Engineering and Technology (E&T) team, we, Aero China Engineering team, provide world-class engineering and R&D capabilities to support Honeywell Aerospace growth including working with leading organizations like COMAC, AVIC, AECC, CETC and CAAC to support the rapid growth of the Chinese commercial aerospace industry. We also support key global programs for Airbus, Dassault, Pilatus, Embraer and Gulfstream.
This is an exciting time to join Honeywell Aero China Engineer team. It’s a great place to showcase your strategic and technical leadership abilities.
This position will be in Shanghai, China. This is the role of the Electronic Solution Platform IC design team.
Role Overview
As an HW Engineer II, you will be a key contributor to the development of mission-critical avionics systems, including Flight Control Systems, Actuator Control Equipment (ACE), Display Products, Cockpit Systems and communication navigation surveillance systems. You will be responsible for translating high-level requirements into robust RTL designs and developing comprehensive verification environments. This role requires a high degree of rigor in following DO-254 processes and active participation in international certification audits with authorities such as CAAC, FAA, and EASA.
Key Responsibilities
• Requirement-Driven Design: Perform RTL design and implementation (Verilog/VHDL) based strictly on the hardware requirements. Ensure full traceability from requirements to code.
• V&V Strategy & Execution: Develop automated Verification & Validation (V&V) test scripts and environments. Utilize SystemVerilog/UVM methodology to build constrained-random test benches and achieve 100% code and functional coverage.
• Certification & Audits: Actively participate in formal stage of involvement (SOI) reviews and technical audits with regulatory bodies (CAAC, FAA, EASA). Prepare and present design data to support DO-254 compliance.
• Documentation: Author and maintain lifecycle data including Hardware Design Documents, Verification Plans, and Traceability Matrices in accordance with Design Assurance Levels (DAL A/B/C/D).
• Global Collaboration: Coordinate with cross-functional and global engineering teams to align on architecture, requirements, interface standards and project milestones.
Required Skills & Qualifications
• Experience: 2-5 years of professional experience in FPGA/ASIC design and verification, preferably within the aerospace industry.
• Technical Proficiency:
• Strong mastery of Verilog and VHDL.
• Extensive experience with Xilinx Vivado/Altera Quartus (Synthesis, Implementation, and Timing Closure) and QuestaSim (Simulation).
• Advanced knowledge of UVM for building modular, scalable test benches.
• Familiar with Unix/Linux OS operation and writing test scripts (Python, Tcl, or Perl).
• Familiar with common peripheral interfaces protocols (PCIE, Ethernet, SPI, I2C, UART, etc.)
• Process Knowledge: Understanding of the DO-254 lifecycle and hardware design assurance processes.
• Aviation Interfaces: Familiarity with avionics communication protocols such as ARINC 429, ARINC 664 (AFDX), and MIL-STD-1553.
• Communication: Excellent English verbal and written communication skills, with the ability to clearly explain technical concepts to global stakeholders and certification authorities.
Preferred Qualifications
• Direct experience participating in SOI-1 through SOI-4 audits.
• Experience with Requirement Management tools (e.g., IBM DOORS).
• Knowledge of Model-Based Design (MBD) or SysML.