Own the planning, creation, and delivery of top-level floorplan deliverables and implementation for Silicon SOC projects from concept to working silicon volume.
Resolve structural or physical issues related to the integration of ASICs and SoCs, and collaborate with teams across Google to develop ideas for silicon and hardware projects.
Manage all cross-functional interactions related to top-level floorplanning of chip projects.
Develop and improve floorplan implementation methodologies. Support and execute implementation flows using both industry-standard and specialized internal tools.
Perform technical evaluations of vendors and IP, providing recommendations and assessments of process node trade-offs to meet PPA, and cost goals.

SoC Silicon Top-Level Floorplan Engineer

Job Description