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Power and Performance Architect, TPU

Posted 1 months ago

Job Description

  • Lead the definition of power architecture for the next generation of TPU SOCs, optimizing for performance-per-watt across machine learning (ML) workloads.
  • Bridge the architecture-to-execution gap by partnering with SOC implementation, IP providers, and hardware and software validation teams.
  • Drive the design and integration of power management features, including dynamic voltage and frequency scaling (DVFS), power gating, and thermal mitigation strategies.
  • Collaborate with the software community and data center teams to provide technology roadmaps that align silicon capabilities with system-level power constraints.
  • Provide technical leadership and mentorship across multidisciplinary teams to anticipate future data center architectures and define SOC requirements.
Power and Performance Architect, TPU at Google | Renata