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Job Description
- Drive design methodology, libraries, debug, code review in co-ordination with other IP Design Verification (DV) teams and Physical Design teams.
- Identify and drive power, performance and area of improvements.
- Participate in design, implementation and integration of chassis and subsystems.
- Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks.
- Perform quality check flows like Lint, CDC, RDC, VCLP.