Back to jobs
Job Description
- Work cross-functionally to debug failures and verify the functional correctness of the design.
- Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
- Plan and execute the verification of the next generation configurable Infrastructure IPs, interconnects and memory subsystems.
- Create and enhance constrained-random verification environments using SystemVerilog and UVM.
- Close coverage measures to identify verification holes and to show progress towards tape-out.