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Job Description
- Deliver compiler parallelization features and optimization techniques for TPU back-end necessary for large-scale workloads.
- Contribute to collective operation lowering/implementation on TPU platform.
- Develop compiler optimization techniques at lower level and throughout the compiler stack.
- Analyze upcoming and existing features in TPU architectures and leverage them for most optimal horizontal scaling performance.
- Collaborate with ML Performance and research teams on achieving roofline performance for the most critical workloads. Build compiler related tools for debugging and preventing scaling issues and improving engineering experience.