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Job Description
- Define and document the microarchitecture for digital designs within the TPU.
- Develop high-quality, performant, and power-efficient Register Transfer Level (RTL) code, primarily in SystemVerilog.
- Collaborate with the verification team to develop test plans, debug RTL, and ensure functional correctness.
- Co-ordinate with the physical design team to meet timing, area, power, and manufacturability requirements.
- Contribute to the development and enhancement of design tools, flows, and methodologies.