Develop, analyze, optimize system-on-chip (SOC) and develop custom IP for silicon designed for Google’s consumer devices or other products.
Lead development of cutting-edge SOC and IP microarchitecture to ensure best PPA (Power, Performance, Area) in the design.
Work closely with architect and SW teams to define new IP and its corresponding micro-architecture that provides added value to users.
Engage in quality checks of front-end design, including writing RTL and running quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, UPF, and Low Power Optimization/Estimation).
Contribute to development of methodology and tools, to improve the efficiency of designs to meet product requirements.

Platforms and Devices Senior Silicon Engineer - SoC Front-End / RTL Design (multiple openings)

Job Description