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Job Description
- Drive the complete RTL life-cycle from initial microarchitecture, coding, and documentation to sign-off readiness (Lint, CDC, synthesis) for high-performance designs meeting strict PPA targets and quality guidelines.
- Collaborate with system architects to align on chip-level bandwidth, latency, and power objectives, and partner with the Verification and Physical Design teams to define test plans and achieve timing closure.
- Identify test requirements, define methodology/tools, and execute testing of silicon systems; drive protocol resolution and lead post-silicon bring-up to validate link integrity and subsystem performance.
- Influence designs to enhance testing, validation, and debugging capabilities, while establishing third-party IP requirements and driving the selection process.
- Develop and maintain policies, processes, procedures, methods, and documentation for silicon deliverables to enhance efficiency, productivity, and project sustainability.