Job Details:

Job Description:

Designs, develops, validates, and/or debugs software abstractions and frameworks for acceleration with FPGAs to support embedded, data center, and communication clients.

Requires minimum of 8+ years of experience in Design Verification, testing and debug. Preferred to have system level understanding. High Proficiency with System Verilog, UVM flow, development, performance grading. Very good understanding of latest protocol specifications for memory, bus protocol specification like AXI, PCIe and Ethernet interfaces, Security IPs (for ex: MACSec). Experience with FPGA simulation tools like VCS, Verdi etc. New product release and rollout support.Customer technical support. Good communication and presentation skills . Mentoring juniors.

Qualifications:

Bachelor's or Master's degree in Computer Science, Engineering in Electronics or Electrical or Telecom or VLSI Engineering or equivalent. Requires minimum of 8+ years of experience in Design Verification, testing and debug. Preferred to have system level understanding. High Proficiency with System Verilog, UVM flow, development, performance grading. Very good understanding of latest protocol specifications for memory, bus protocol specification like AXI, PCIe and Ethernet interfaces, Security IPs (for ex: MACSec). Experience with FPGA simulation tools like VCS, Verdi etc. New product release and rollout support.Customer technical support. Good communication and presentation skills . Mentoring juniors.

Job Type:

Regular

Shift:

Shift 1 (India)

Primary Location:

Bengaluru, Karnataka, India

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.