Senior FPGA Engineer – Relocation to Spain

Requirements Specification and Traceability : Use of tools such as DOORS to manage and track requirements and their verification through tests. Logic Circuit Design and Verification : Development of advanced synthesizable VHDL code. Verification of logic circuits using VHDL testbenches and simulators such as ModelSim. Control Interface Design : Implementation and management of communication interfaces such as UART, SPI, and I2C. Hands-on work with Xilinx FPGAs , specifically Zynq and UltraScale families. Vivado Design Environment : Use of the Vivado toolchain to develop and verify designs. Design and integration of Xilinx IP cores as well as development of custom IP cores. AXI Bus Implementation and Logic Analysis : Implementation of AXI buses and use of Chipscope for integrated logic analysis. Scripting and Embedded Development : Creation of scripts in XSCT and development of standalone applications in SDK.