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Senior DFT Design/Micro Architect Engineer, Google Cloud
Posted 2 weeks ago
No longer available
Job Description
- Develop DFT strategy and architecture (e.g., hierarchical DFT, DFT for High speed IOs, Analog DFT).
- Develop and drive die level DFT validation strategy and complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
- Integrate DFT logic, boundary scan, scan chains, DFT compression, Logic BIST, TAP controller, clock control block, and other DFT IP blocks.
- Document DFT architecture, test sequences, and boot-up sequences associated with test pins.
- Generate and deliver the production and debug patterns to Post Silicon Engineering team and run diagnosis for post silicon supports.