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Job Description
- Develop test patterns that optimally tests the logic/Memory/Analog Macro under test.
- Deliver confidence in the correctness of the design for testability and debug features of the server scale CPU SoC.
- Integrate DFT verification into the overall ASIC design flow.
- Prepare Silicon debug verification strategy, test plan, and readiness for tester.
- Participate in post manufacturing silicon bring-up tasks.