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Browse fresh roles from company career pages, then filter by keyword, location, salary, skills, remote scope, and more. Each listing links back to the employer-controlled apply path when available.
981 jobs match your filters
5d
Silicon Design Verification Engineer ll, Google Cloud
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Create a constrained-random verification environment using SystemVerilog and the Universal Verification Methodology (UVM). Identify and write all types
5d
Senior Design Verification Engineer, Google Cloud
Dahl Consulting
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct desig
1w
Senior Silicon Design Verification Engineer, Google Cloud
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct desig
1w
Senior Silicon Design Verification Engineer, Google Cloud
Dahl Consulting
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct desig
1w
Senior Design Verification Engineer, Multimedia/AI/ML, Silicon
Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process. Plan the verification of multimedia design blocks at subsystem level by understanding the
1w
Senior Design Verification Engineer, Multimedia/AI/ML, Silicon
Dahl Consulting
Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process. Plan the verification of multimedia design blocks at subsystem level by understanding the
1w
Senior CPU Design Verification Engineer, Emulation
Act as the critical bridge between Emulation, Design Verification (DV), and Register-Transfer Level (RTL) teams to accelerate root-cause analysis. Correlate DV simulation failures with emulation results by analyzing SystemVerilog/UVM testbenches. Lead post-silicon debug by analyz
1w
Senior CPU Design Verification Engineer, Emulation
Dahl Consulting
Act as the critical bridge between Emulation, Design Verification (DV), and Register-Transfer Level (RTL) teams to accelerate root-cause analysis. Correlate DV simulation failures with emulation results by analyzing SystemVerilog/UVM testbenches. Lead post-silicon debug by analyz
1w
Silicon Design Verification Engineer, Google Cloud
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct desig
1w
Silicon Design Verification Engineer, Google Cloud
Dahl Consulting
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct desig
2w
CPU Design Verification Engineer
Dahl Consulting
Design verification for future CPU developments. Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments. Produce diagnostic code repositories that enable production of CPU’s. Verify and v
2w
CPU Design Verification Engineer
Design verification for future CPU developments. Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments. Produce diagnostic code repositories that enable production of CPU’s. Verify and v
2w
Tensor SOC Performance Design Verification Engineer
Dahl Consulting
Develop simulators and architectural models of Google's Tensor SOC. Collaborate with system architects, SoC and CPU/GPU/TPU architects/designers, and software and application experts to understand current and future requirements. Participate in architectural and design evaluation
2w
Tensor SOC Performance Design Verification Engineer
Develop simulators and architectural models of Google's Tensor SOC. Collaborate with system architects, SoC and CPU/GPU/TPU architects/designers, and software and application experts to understand current and future requirements. Participate in architectural and design evaluation
2w
VIE - Design Verification Engineer (m/f)
Alstom
Req ID:518823 At Alstom, we understand transport networks and what moves people. From high-speed trains, metros, monorails, and trams, to turnkey systems, services, infrastructure, signalling and digital mobility, we offer our diverse customers the broadest portfolio in the indus
Toronto, ON, CA
hybrid
2w
Silicon Design Verification Engineer, Silicon Cloud
Dahl Consulting
Debug tests with design engineers to deliver functionally correct design blocks. Perform integration checks like connectivity. Write tests in SystemVerilog (SV) and assembly/C. Perform SoC Boot, configuration and data path verification at SoC level. Participate in design debug, c
2w
Silicon Design Verification Engineer, Quantum AI
Dahl Consulting
Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. Develop and maintain constrained-random verification environments using System Verilog and Un
2w
SoC Performance Design Verification Engineer, Silicon
Dahl Consulting
Verify designs using verification techniques and methodologies. Work cross-functionally to debug failures and verify the functional correctness of the design. Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure
2w
Lead CPU Design Verification Engineer, Silicon
Dahl Consulting
Design verification for future CPU developments. Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments. Produce diagnostic code repositories that sufficiently enable production of qualit
2w
Senior Design Verification Engineer, Networking, Google Cloud
Dahl Consulting
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios. Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test cover
2w
ASIC Design Verification Engineer, Devices and Services, Silicon
Dahl Consulting
Verify designs using verification techniques and methodologies. Work cross-functionally to debug failures and verify the functional correctness of the design. Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure
2w
Senior Networking Design Verification Engineer, Google Cloud
Dahl Consulting
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios. Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test cover
2w
ASIC Design Verification Engineer, TPU
Dahl Consulting
Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. Create and enhance constrained-random verification environments using SystemVerilog and UVM,
2w
Senior Design Verification Engineer, TPU, Google Cloud
Dahl Consulting
Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct desig
2w
ASIC Design Verification Engineer, Platforms and Devices
Dahl Consulting
Plan and execute the verification of next-generation configurable infrastructure IPs, interconnects, and memory subsystems. Create and enhance constrained-random verification environments using SystemVerilog and UVM. Identify and write all types of coverage measures for stimulus